1. Field of the Invention
This disclosure is related to the field of computer systems, and more particularly to systems and methods for processing quality-of-service (QoS) information of memory transactions.
2. Description of the Related Art
Some computers feature memory access mechanisms that allow hardware subsystems or input/output (I/O) peripherals to access system memory without direct interference from a central processing unit (CPU) or processor. As a result, memory transactions or requests involving these peripherals may take place while the processor continues to perform other tasks, thus increasing overall system efficiency. Moreover, enabling a variety of circuits to access a common memory creates situations where the memory may have to make decisions as to the order in which received requests are processed, for example.
To allow the memory to make these types of decisions, a quality-of-service (QoS) mechanism may be implemented such that an entity generating a memory request may also provide information representing the QoS associated with that request. In a typical scenario, every circuit in the path of a memory request or transaction containing QoS information must be capable of processing that information—or at least of forwarding the information to a subsequent circuit which is then capable of processing it.